Design Services

Our expert staff is skilled at analog, digital, and mixed-signal design, ranging from the individual device level to the system architecture level. In house we have the knowledge and expertise to develop an IC product from design start to production-worthy mask sets. Furthermore, we support packaging and testing and supply-chain management in cooperation with our Partners. Customers looking for a complete IC product development can access SystematIC as a one-stop shop where SystematIC will provide and manage the connections to IC production facilities.

Design Chain

In the development trajectory of an IC design the following phases can be distinguished.

SystematIC clearly presents these phases in the development process and provides customers the opportunity to step-in and out or iterate in each of these steps.
  1. Feasibility phase

    This phase precedes the design phases in cases for which the IC product is not yet well defined or where it is part of a system or application that is still in development. SystematIC offers a strong involvement and commitment in such developments by investigating the system aspects beyond the scope of the IC design. A better or cheaper end-product can be realized when SystematICs knowledge on IC design and signal processing is involved in the product definition phase. Key to this benefit is investiging the trade-offs between performance, power consumption and chip area (IC costs) in relation to the application requirements. Aspects of IC process choice and feasibility of specifications are included in the investigation.
  2. System configuration

    Before starting on the detailed circuit design, it is important to consider the system configurations options. Signal processing can often be implemented in different forms. Different choices for analog or digital processing, for multiplexing, for up- or down-conversion and so on, do have consequences for the circuit design and the performance of the end-product. In this phase of the development an optimal (or at least an acceptable) choice needs to be made for the system configuration. The proof of concept can be confirmed by doing system-level simulation using models of the subblocks. In this step, the required specifications of the subblocks are formulated and verified. This helps to streamline the circuit design phase for multiple design engineers working in parallel.
  3. Circuit design phase

    This phase concerns the detailed transistor-level circuit design of the different subblocks in the chosen IC process. Simulations over PVT (Process corners, supply-Voltage and Temperature range) are done to verify compliance with the specifications. Toplevel simulations are done to verify complete functionality. Also ESD and testability aspects are included in the circuit design. SystematIC engineers are familiar with the different design aspects and a broad portfolio of related design tools. To provide flexibility in the schedule, the full documentation of the design and the simulations results can be included either in this circuit design phase or completed at a later stage, for example during the processing.
  4. IC Layout phase

    Layout of the IC is often a critical element in working towards first silicon that is fully functional. Both the time-to-tapeout and the layout quality can be critical. We understand the need of interaction between design and layout to guarantee an optimal layout. Efficient communication, teamwork, control of layout tools and verifications (DRC,LVS) are essential in this phase. The IC layout can be performed, managed or verified by SystematIC in order to accomplish a successful in-time tape-out.

    IC processing, testing, packaging
    In general, SystematIC engineering is not involved in these phases. At SystematIC we are familiar with the process steps and other procedures and can mediate between foundry and customer. When required, we provide designer assistance for optimizing yield and/or production tests.
  5. Evaluation phase

    The proof of the IC design is in the test results. For SystematIC engineers it is natural to check their designs in practice. Besides verification of the IC functionality, it is essential to understand the combination and interaction of the integrated circuit and the application. SystematIC can contribute to the evaluation in several ways. To name some examples: we can perform measurements and functional tests at SystematIC, we can guide tests done by the customer and then examine and verify the results, or we can assist in verification at a third party test facility. Either way, our commitment is to provide operational engineering samples and quickly work towards production-ready design.

    Minimum number of design iterations
    Time to market is an extremely important aspect in many electronic developments. The best strategy is getting the most out of the first silicon. The risk in a second run, if needed, should be minimal. Therefore it is important to acknowledge and address potential risks and uncertainties in a first IC/product design as early as possible. Our approach in the above described development steps aims to do so in the first step. Also, in the consecutive system and circuit design, our attention for detailed circuit simulation and toplevel verification is very important. Understanding model accuracy, component mismatch and process corner variations helps to make robust circuit designs. The time and attention that we invest in the first design is in almost all cases rewarded with fully functional first silicon.

    Then, careful evaluation, measuring and testing is still needed to validate the performance. Comparison of measured and simulated specifications is essential in order to quickly accomplish a ‘centered’ production-ready design. For a well-defined IC product in a well-modelled process, our target is to get the silicon right first time. However, if design adjustments are needed or foreseen, these must require minimum efforts in a second design and layout: iteration of phase 3-4-5 can then be done quickly (going back to phase 1 or 2 usually is unfavorable and time consuming). Often metal mask options and dummies can be included in the first IC design. A second series of improved ICs can then be made quickly by doing the respin with only one or just a few new metal and contact masks.

    We gladly investigate the possibilities for a quick development of your IC product!


SystematIC Delft (HQ)
Motorenweg 5G
2623 CR Delft
The Netherlands

Phone: +31 15 2511100


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